uc29432 uc39432 uc39432b description the uc39432 is an adjustable precision analog controller with 100ma sink capability if the iset pin is grounded. a resistor between iset and ground will modify the transconductance while decreasing the maximum current sink. this will add further control in the optocoupler configuration. the trimmed precision reference along with the non-inverting error amplifier in - puts are accessible for custom configuration. a sister device, the uc39431 adjustable shunt regulator, has an on-board resistor network providing six preprogrammed voltage levels, as well as external programming capability. precision analog controller features ? programmable transconductance for optimum current drive ? accessible 1.3v precision reference ? both error amplifier inputs available ? 0.7% overall reference tolerance ? 0.4% initial accuracy ? 2.2v to 36.0v operating supply voltage and user programmable reference ? reference accuracy maintained for entire range of supply voltage ? superior accuracy and easier compensation for optoisolator application ? low quiescent current (0.50ma typ) slus301 march 1999 block diagram udg-95093
2 uc19432 uc29432 uc39432 uc39432b dil-8, soic-8 (top view) n or j, d package absolute maximum ratings supply voltage: vcc. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36v regulated output: v coll . . . . . . . . . . . . . . . . . . . . . . . . . . . 36v ea input: sense, ea+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6v ea compensation: comp. . . . . . . . . . . . . . . . . . . . . . . . . . . 6v reference output: ref . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6v output sink current: i coll . . . . . . . . . . . . . . . . . . . . . . . 140ma output source current: iset . . . . . . . . . . . . . . . . . . . . ?140ma power dissipation at t a 25c (dil-8) . . . . . . . . . . . . . . . . 1w derate 8mw/c for t a > 25c storage temperature range . . . . . . . . . . . . . ?65c to +150c junction temperature . . . . . . . . . . . . . . . . . . . ?55c to +150c lead temperature (soldering, 10 sec.) . . . . . . . . . . . . . +300c currents are positive into, negative out of the specified termi - nal. consult packaging section of databook for thermal limita - tions and considerations of packages. electrical characteristics: unless otherwise stated, these specifications apply for t a = ?55c to +125c and coll output = 2.4v to 36.0v for the uc19432, t a = ?25c to +85c and coll output = 2.3v to 36.0v for the uc29432, and t a = 0c to +70c and coll output = 2.3v to 36.0v for the uc39432, vcc = 15v, i coll = 10ma, t a =t j . parameter test conditions min typ max units reference voltage tolerance t a = 25c 19432* 1.295 1.3 1.305 v 39432b 1.29 1.3 1.31 v reference temperature tolerance v coll = 5.0v 19432* 1.291 1.3 1.309 v 39432b 1.286 1.3 1.314 v reference line regulation vcc = 2.4v to 36.0v, v coll = 5v 19432* 10 38 mv 39432b 10 57 mv reference load regulation i coll = 10ma to 50ma, v coll = 5v 19432* 10 38 mv 39432b 10 57 mv reference sink current 10 a reference source current ?10 a ea input bias current ?0.5 ?0.2 a ea input offset voltage 19432* 4.0 mv 39432b 4.0 mv ea+ operational voltage limitations (note 1) 0.9 1.6 v ea output current sink (internally limited) 16 a ea output current source ?1 ma minimum operating current vcc = 36.0v, v coll = 5v 0.50 0.80 ma collector current limit (note) v coll = vcc = 36.0v, ref = 1.35v iset = gnd 130 145 ma collector saturation i coll = 20ma 0.7 1.1 1.5 v transconductance (gm) (note) vcc = 2.4v to 36.0v, v col = 3v, i coll = 20ma iset = gnd 19432* ?170 ?140 ?110 ms 39432b ?180 ?140 ?100 ms error amplifier avol 60 90 db error amplifier gbw (note 1) 3.0 5 mhz transconductance amplifier gbw 3 mhz * also applies to the uc29432 and uc39432 note: programmed transconductance and collector current limit equations are specified in the iset pin description. note 1: guaranteed by design. not 100% tested in production. connection diagram
3 uc19432 uc29432 uc39432 uc39432b coll: the collector of the output transistor with a maxi - mum voltage of 36v. this pin is the output of the transconductance amplifier. the overall open loop volt - age gain of the transconductance amplifier is gm r l , where gm is designed to be ?140ms 30ms and rl rep - resents the output load. comp: the output of the error amplifier and the input to the transconductance amplifier. this pin is available to compensate the high frequency gain of the error ampli - fier. it is internally voltage limited to approximately 2.0v. ea+: the non-inverting input to the error amplifier. gnd: the reference and power ground for the device. the power ground of the output transistor is isolated on the chip from the substrate ground used to bias the re - mainder of the device. iset: the current set pin for the transconductance ampli - fier. the transconductance will be ?140ms as specified in the electrical table if this pin is grounded. if a resis- tance r l is added to the iset pin, the resulting new transconductance is calculated using the following equa- tion: gm = ?0.714v ? (5.1 +r l ). the maximum current will be approximately i v r max l = + 06 51 . . ? ref: the output of the trimmed precision reference. it can source or sink 10 a and still maintain the 1% tem - perature specification. sense: the inverting terminal of the error amplifier used as both the voltage sense input to the error amplifier and its other compensation point. the error amplifier uses the sense input to compare against the 1.3v on-chip refer - ence. the sense pin is also used as the undervoltage lockout (uvlo). it is intended to keep the chip from operating un - til the internal reference is properly biased. the threshold is approximately 1v. it is important that once the uvlo is released, the error amplifier can drive the transconductance amplifier to stabilize the loop. if a ca - pacitor is connected between the sense and comp pins to create a pole, it will limit the slew rate of the error amplifier. to increase the bandwidth and ensure startup at low load current, it is recommended to create a zero along with the pole as shown in the uc39431 shunt reg- ulator application. the error amplifier must slew 2.0v to drive the transconductance amplifier initially on. vcc: the power connection for the device. the minimum to maximum operating voltage is 2.2v to 36.0v. the qui- escent current is typically 0.50ma. pin descriptions figure 1. 5.0v optocoupler application. udg-95094
4 uc19432 uc29432 uc39432 uc39432b overvoltage comparator application the signal v in senses the input voltage. as long as the input voltage is less than 5.5v, the output is equal to the voltage on v in . during this region of operation, the diode is reversed biased which keeps the ea+ pin at 1.3v. when v in exceeds the over voltage threshold of 5.5v, the output is driven low. this forward biases the diode and creates hysteresis by changing the threshold to 4.5v. optocoupler application the optocoupler application shown takes advantage of the accessible pins ref and iset. the iset pin has a 33 ohm resistor to ground that protects the opto-coupler by limiting the current to about 16ma. this also lowers the transconductance to approximately 19ms. the ability to adjust the transconductance gives the designer further control of the loop gain. the ref pin is available to sat - isfy any high precision voltage requirements. figure 2. 5.5v overvoltage comparator with hysteresis. udg-95096 udg-95095 unitrode corporation 7 continental blvd. merrimack, nh 03054 tel. (603) 424-2410 fax (603) 424-3460
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